69 lines
1.6 KiB
C
69 lines
1.6 KiB
C
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/*
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* Copyright (c) 2020 Institute of Parallel And Distributed Systems (IPADS),
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* Shanghai Jiao Tong University (SJTU) OS-Lab-2020 (i.e., ChCore) is licensed
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* under the Mulan PSL v1. You can use this software according to the terms and
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* conditions of the Mulan PSL v1. You may obtain a copy of Mulan PSL v1 at:
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* http://license.coscl.org.cn/MulanPSL
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY
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* KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO
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* NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. See the
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* Mulan PSL v1 for more details.
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*/
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#include <common/smp.h>
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#include <common/sync.h>
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#include <tests/barrier.h>
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#include <common/errno.h>
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#include <common/kprint.h>
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#include <common/macro.h>
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#include <common/types.h>
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volatile u64 cpu_barrier[PLAT_CPU_NUM];
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#define PRIMARY_CPU_ID 0
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void global_barrier_init(void)
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{
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int i;
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for (i = 0; i < PLAT_CPU_NUM; i++) {
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cpu_barrier[i] = 0;
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}
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}
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void global_barrier(bool is_bsp)
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{
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if (is_bsp)
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global_barrier_primary();
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else
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global_barrier_secondary();
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}
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void global_barrier_primary(void)
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{
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int i;
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u32 cpu_id = smp_get_cpu_id();
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u64 barrier_num;
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BUG_ON(PRIMARY_CPU_ID != cpu_id);
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barrier_num = cpu_barrier[cpu_id];
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for (i = 0; i < PLAT_CPU_NUM; i++) {
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if (i == cpu_id)
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continue;
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while (cpu_barrier[i] != barrier_num + 1) ;
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}
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cpu_barrier[cpu_id] = barrier_num + 1;
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asm volatile ("dsb sy");
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}
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void global_barrier_secondary(void)
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{
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u32 cpu_id = smp_get_cpu_id();
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u64 barrier_num;
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barrier_num = cpu_barrier[cpu_id];
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cpu_barrier[cpu_id]++;
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while (cpu_barrier[PRIMARY_CPU_ID] != barrier_num + 1) ;
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asm volatile ("dsb sy");
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}
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